1. Field
The present specification generally relates to the manufacture of through glass vias and, more specifically, to etching processes used to manufacture through glass vias.
2. Technical Background
Through-substrate vias provide electrical connections between layers in a physical electronic circuit or chip. For example, in a three-dimensional stacked integrated circuit, the through-substrate vias enable integration of electronic components both vertically and horizontally. Conventionally, through-substrate vias employ a silicon substrate. However, because glass is less expensive than silicon, glass substrates are becoming more prevalent in electronic devices.
While a reduced cost, a flexible coefficient of thermal expansion, and the inherent insulation properties of glass make the choice of glass as a substrate an attractive option, the use of glass presents several challenges. In particular, one challenge of using a glass substrate is the handling of a suitably thin piece of glass during the manufacturing process. Another challenge is forming holes in a glass substrate at a high rate of speed without cracking the glass at the entrance holes and without adversely affecting metallization of the vias.
Accordingly, a need exists for alternative methods for forming through-glass vias which enhance manufacturability and achieve reliable metallization of the vias.